This invention relates to a polysilane composition for forming a coating suitable for bearing a metal pattern, and a metal pattern forming method using the same. It also relates to a method for preparing a wiring board.
Substrates having metal patterns formed thereon are used in a variety of applications, for example, as printed circuit boards and comb-shaped electrode substrates for sensors. Metallization on such substrates is generally carried out by vapor phase methods such as CVD and wet methods as typified by plating methods. The metal is then patterned by a complex method which generally uses a resist material and involves exposure and development steps.
To eliminate such complication, Whiteside et al. proposed a novel metal patterning procedure. This procedure is to form a metal pattern by immersing a rubber material having an irregular surface in a dispersion of palladium colloid. The rubber material is then pressed against a substrate whereby the palladium colloid on raised portions is transferred to the substrate. The substrate is then immersed in an electroless or chemical plating bath whereby a metal deposits only on the palladium colloid- bearing areas. (See Langmuir 1996, 12, 1375-1380.)
Unfortunately, this procedure has the drawback that the palladium colloid is very unstable. Typically, a surfactant such as tetraammonium halide is added to the palladium colloid for stabilizing the colloid. An attempt to apply the palladium colloid by an imprinting, ink jet printing or lithographic process fails because of coagulation and precipitation of the palladium colloid. No uniform metal pattern is formed and the adhesion between the substrate and the metal is insufficient.
Printed circuit boards now encounter a strong need for higher density because of the widespread use of ultra-thin equipment. In prior art printed circuit boards, after a copper foil is bonded to a resin substrate with an adhesive, patterning is carried out using a resist (subtractive process). However, a proper adhesive must be used depending on a particular resin selected from among phenolic resins, polyester resins, epoxy resins, polyimide resins, and bismaleimide triazine resins. A complex bonding process is necessary. The bond strength is not fully high.
In recent years, a need to form a finer metal pattern promotes research efforts on the additive process of metallizing a resin substrate, rather than the subtractive process suffering from the thinning of a metal film by over-etching, so that the additive process may be employed on a commercially acceptable level. For the additive process, however, an improvement in the adhesion between the resin substrate and the metallization is of significance.
For logic devices and system LSI""s, there is a strong need to increase the degree of integration and operational speed of circuits in order to realize high-speed electronic equipment. In this regard, an attention is paid to copper as a low resistance wiring material. In the prior art semiconductor device manufacture, aluminum is used as the material for forming fine metal circuits on semiconductor and a CVD process is used for its application. Copper is more difficult to work than aluminum. Then there is an urgent desire to establish a micro-wiring technique for copper. One solution to the above-described problem is electrolytic plating. It has been studied to apply electrolytic plating to the copper wiring process on a commercially acceptable level (see monthly Semiconductor World, February 1998, pp. 82-85).
However, the electrolytic plating has the drawback that the thickness of metal coating locally varies and is not reproducible, which becomes a neck to mass manufacture. When the electrolytic plating is combined with a resist material and resist process necessary to form a fine metal pattern in a mass scale, optimum conditions of the electrolytic plating have not been fully established.
Polysilane is an interesting polymer because of its UV absorption properties due to the metallic property and unique electron delocalization of silicon as compared with carbon, as well as its high heat resistance, flexibility, and good thin film forming properties. Active research efforts have been made on polysilane for the purpose of developing a photoresist capable of forming a micropattern at a high precision (see, for example, JP-A 6-291273 and 7-114188).
Finding that a palladium colloid forms when a polysilane is contacted with a solution of a palladium salt, and that UV irradiation causes the conversion of polysilane into polysiloxane, the inventors proposed a pattern forming method. The inventors also found that a metal pattern can be formed by combining such characteristics of a polysilane thin film with electroless plating catalyzed by palladium colloid (JP-A 10-325957). However, this method still requires the steps of light irradiation and exposure.
JP-A 5-72694 discloses the use of a polysilane in a method for preparing a semiconductor integrated circuit. This method is characterized in that a film of polysilane optionally doped with iodine is used as a conductive layer and a siloxane layer converted from polysilane by light irradiation is used as an insulating layer. It has thus been contemplated to apply the polysilane or polymer having a Si-to-Si bond as conductive material.
However, the semiconductor integrated circuit obtained by the above method has the problems that the conductive areas consisting solely of polysilane are not fully conductive and the use of potentially corrosive iodine becomes a serious obstacle to the application of polysilane to electronic material. Additionally, since the polysilane which is likely to convert into siloxane upon exposure to moisture, oxygen or light in the ambient atmosphere is used as conductive material, its application to electronic material requiring reliability encounters great difficulty.
JP-A 57-11339 discloses a method for forming a metal image by exposing a compound having a Si-to-Si bond to light and contacting it with a metal salt solution. When the compound having a Si-to-Si bond is contacted with the metal salt solution, the metal salt is reduced to the metal. Utilizing this phenomenon, a metal layer is formed in the unexposed area. To define a definite image by this method, the exposed area must be completely deprived of reducing property, which requires to irradiate a large quantity of light. Upon light exposure, the polysilane is converted into siloxane. Once a finely defined circuit is formed by UV irradiation, it becomes very difficult to further convert the siloxane into a polycarbosilane or polysilazane which is an insulating ceramic precursor having heat resistance and toughness.
There is a desire to have a technique of manufacturing a wiring board of high quality in an industrially advantageous manner.
One object of the invention is to provide a method of forming a metal pattern on a substrate by a simple step such as a conventionally employed imprinting, ink jet printing or lithographic process without a need for light irradiation and exposure. Another object is to provide a polysilane composition used in the method for forming a coating suitable for bearing a metal pattern.
A further object is to provide a method for preparing a wiring board having a pattern of highly conductive areas and insulating areas through simple and inexpensive steps so that the wiring board may have high heat resistance and pattern definition and be used in a variety of applications in the electric, electronic and communication fields.
In a first embodiment of the invention, there is provided a polysilane composition for forming a coating suitable for bearing a metal pattern thereon, comprising a polysilane, a carbon functional silane, and a solvent.
In a second embodiment of the invention, there is provided a metal pattern forming method comprising the steps of:
applying the above-defined polysilane composition onto a substrate by an imprinting, ink jet printing or lithographic process, to form a patterned coating of the polysilane composition,
attaching catalytic metal nuclei for electroless plating to the patterned coating, and
immersing the substrate in an electroless plating bath and depositing an electroless plating film on the patterned coating.
The inventors have found that a composition comprising a polysilane and a carbon functional silane (sometimes abbreviated as CF silane) forms a coating which readily captures a palladium salt and thus ensures that an electroless plating film forms thereon with a firm bond. The coating itself has a high strength. Using the polysilane composition, a patterned film of polysilane can be easily formed on a substrate by an imprinting, ink jet printing or lithographic process. After catalytic metal nuclei such as palladium nuclei are distributed on the patterned coating, the substrate is immersed in an electroless plating bath. In this way, a metal pattern can be formed by a simple inexpensive process without a need for exposure and development steps.
In a third embodiment of the invention, there is provided a method for preparing a wiring board comprising the steps of:
(1) forming a carbon functional silane-containing polysilane thin film on a substrate and contacting a palladium salt with a surface of the polysilane thin film to form a palladium colloid layer thereon,
(2) forming a photosensitive resin layer on the polysilane thin film having the palladium colloid layer, selectively irradiating light to the layer, and developing the layer, to thereby form a predetermined pattern of channels in the photosensitive resin layer so that the polysilane thin film having the palladium colloid layer is exposed within the channels, and
(3) contacting an electroless plating solution with the polysilane thin film having the palladium colloid layer exposed within the channels, for thereby forming a conductive metal layer within the channels.
In a fourth embodiment of the invention, there is provided a method for preparing a wiring board comprising the steps of:
(I) forming a SiH group-containing polysilane thin film on a substrate and irradiating light to the thin film for crosslinking the polysilane for thereby insolubilizing the polysilane,
(II) forming a photosensitive resin layer on the crosslinked polysilane thin film, selectively irradiating light to the layer, and developing the layer, to thereby form a predetermined pattern of channels in the photosensitive resin layer so that the crosslinked polysilane thin film is exposed within the channels, and
(III) contacting a palladium salt with the crosslinked polysilane thin film exposed within the channels to form a palladium colloid layer and contacting an electroless plating solution for thereby forming a conductive metal layer within the channels.
The inventors found that when a polysilane is previously irradiated with UV radiation, the polysilane is converted into a polysiloxane so that the surface is changed to be polar. When this polysiloxane is contacted with a palladium salt solution, a palladium colloid can be formed, which enables pattern formation. As long as the palladium colloid is attached to the surface of a resin coating, the electroless plating method permits a metal film of uniform thickness to form on a variety of resins. A metal pattern of copper can be formed by combining the above-described characteristics of a polysilane thin film with electroless plating catalyzed by palladium colloid. A circuit board having improved heat resistance and pattern definition can be manufactured by a simple inexpensive process. This process is proposed in Japanese Patent Application No. 10-94111.
Continuing the research, the inventors found that in a method for preparing a circuit board utilizing a metal pattern, the metal pattern sometimes has an unsatisfactory adhesion to the substrate. When the metal pattern is formed utilizing the optically defined resist pattern, the metal area partially spreads with the progress of metal deposition. Then, the pattern resulting from the resist becomes far from satisfactory.
Then the inventors made further research to produce a wiring board which has improved adhesion between a metal pattern and a substrate and an improved pattern profile. In the wiring board preparing method according to the third embodiment of the invention, a composition comprising a polysilane and a CF silane as main components is applied onto a substrate to form a CF-silane containing polysilane thin film having an improved film strength. When the polysilane thin film is contacted with a palladium salt, the palladium salt is readily captured by the polysilane thin film to form a palladium colloid layer thereon. Then a photosensitive resin layer is formed on the palladium colloid layer for forming a pattern of channels. The CF-silane containing polysilane thin film is exposed within the channels. Then electroless plating is carried out. The adhesion between the conductive metal layer of copper or the like formed by the electroless plating and the substrate is strong. Since the conductive metal layer is formed within the channels, there is no risk that the conductive metal area spreads out.
In the wiring board preparing method according to the fourth embodiment of the invention, a polysilane undergoes crosslinking reaction under irradiation of light such as ultraviolet radiation and becomes insoluble in solvents. Even after being crosslinked by light irradiation, this polymer is effective for readily reducing a palladium salt in contact therewith, to form a palladium colloid. A photosensitive resin layer is then formed on the crosslinked polysilane thin film to define a predetermined pattern of channels so that the crosslinked polysilane thin film is exposed within the channels. After a palladium colloid layer is formed thereat, electroless plating is carried out to form a conductive metal layer as in the third embodiment. In this way, there can be formed a metal pattern which has improved adhesion to the substrate, and is stable and free of the risk that the conductive metal area spreads out. A conductive wiring pattern having satisfactory definition can be manufactured by a simple inexpensive process.
The wiring board preparing method of the invention can fabricate, through simple and inexpensive steps, a wiring board which has high heat resistance and a high degree of pattern definition and can be used in a variety of applications in the electric, electronic and communication fields.